Research reports


  • With Jean-Marc Delosme, "Partitioning for Array Processors". RR90-23


  • With Tanguy Risset et Yves Robert, "Synthesizing Systolic Arrays: Some Recent Developments". RR91-09

  • "Regular Partitioning for Synthesizing Fixed-Size Systolic Arrays". RR91-10

  • With Leonid Khachiyan et Yves Robert, "Linear Scheduling is Nearly Optimal". RR91-35


  • With Yves Robert, "Scheduling Uniform Loop Nests". RR92-10

  • With Yves Robert, "Affine-by-Statement Scheduling of Uniform Loop Nests over Parametric Domains". RR92-16

  • "Affine-by-Statement Scheduling: Extensions for Affine Dependences and Several Parameters". RT92-03


  • With Yves Robert, "Mapping Uniform Loop Nests onto Distributed Memory Architectures". RR93-03

  • With Yves Robert, "A Graph-Theoretic Approach to the Alignment Problem". RR93-20

  • With Pierre Boulet, Tanguy Risset et Yves Robert, "(Pen)-ultimate Tiling?". RR93-36


  • With Vincent Bouchitté, Pierre Boulet et Yves Robert, "Evaluating Array Expressions on Massively Parallel Machines with Communication/Computation Overlap". RR94-10

  • With Frédéric Vivien, "Automatic Parallelization Based on Multi-Dimensional Scheduling". RR94-24


  • With Michčle Dion et Yves Robert, "A Characterization of One-to-One Modular Mappings". RR95-09

  • With Frédéric Vivien, "A Comparison of Nested Loops Parallelization Algorithms". RR95-11

  • With Pierre-Yves Calland et Yves Robert, "A New Guaranteed Heuristic for the Software Pipelining Problem". RR95-42


  • With Pierre-Yves Calland, Yves Robert et Frédéric Vivien, "On the Removal of Anti and Output Dependences". RR96-04

  • With Frédéric Vivien, "On the Optimality of Allen and Kennedy's Algorithm for Parallelism Detection in Nested Loops". RR96-05

  • With Frédéric Vivien, "Optimal Fine and Medium Grain Parallelism Detection in Polyhedral Reduced Dependence Graphs". RR96-06

  • With Pierre-Yves Calland, Yves Robert et Frédéric Vivien, "Plugging Anti and Output Dependence Removal Techniques into Loop Parallelization Algorithms". RR96-13

  • With Georges-André Silber et Frédéric Vivien, "Combining Retiming and Scheduling Techniques for Loop Parallelization and Loop Tiling". RR96-34


  • With Pierre Boulet, Georges-André Silber et Frédéric Vivien, "Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation". RR97-17

  • "Mathematical Tools for Loop Transformations: From Systems of Uniform Recurrence Equations to the Polytope Model". RR97-26


  • With Guillaume Huard, "Retiming et parallélisation automatique". RR1998-33

  • With Georges-André Silber, "The Nestor Library: a Tool for Implementing Fortran Source to Source Transformations". RR1998-42

  • "On the Complexity of Loop Fusion". RR1998-50


  • With Rob Schreiber, Bob Rau, and Frédéric Vivien, "A Constructive Solution to the Juggling Problem in Systolic Array Synthesis". RR1999-15

  • With Guillaume Huard, "Loop Shifting for Loop Compaction". RR1999-29


  • With Guillaume Huard, "Loop Shifting for Loop Parallelization". RR2000-22


  • With Daniel Chavarría-Miranda, Robert Fowler, and John Mellor-Crummey "Efficient Parallelization of Line-Sweep Computations". RR2001-45


  • With Guillaume Huard "New Results on Array Contraction". RR2002-17

  • With Guillaume Huard "New Complexity Results on Array Contraction and Related Problems (Extension to Research Report 2002-17)". RR2002-41


  • With Rob Schreiber and Gilles Villard "Lattice-Based Memory Allocation". RR2004-23

  • With Rob Schreiber "Nested Circular Intervals: A Model for Barrier Placement in Single-Program, Multiple-Data Codes with Nested Loops". RR2004-57


  • With Steven Derrien and Tanguy Risset "Hardware/Software Interface for Multi-Dimensional Processor Arrays". RR2005-15

  • With Florent Bouchez, Christophe Guillon, and Fabrice Rastello "Register Allocation and Spill Complexity under SSA". RR2005-33

  • With Hadda Cherroun and Paul Feautrier "Scheduling with Resource Constraints using Dis-Equations". RR2005-40