Aurélien Cavelan

- PhD Student at ENS Lyon

me

Contact:

address. 46 Allée d'Italie
69364 Lyon
France

office. 355 Sud

tel. +33(0) 4 26 23 39 28

mail. aurelien.cavelan[at]ens-lyon.fr

ENS
LIP
INRIA
UCBL

About

I am currently a third-year PhD student at ENS Lyon, in France. I am working in the ROMA team at the LIP laboratory, and my advisors are Anne Benoit and Yves Robert.

I am interested in any new scheduling problems related to resilience and energy consumption, but also algorithmic problems such as finding good approximation algorithms. I have further done some work on checkpointing and verification strategies for HPC systems.

Here, you will find information about my work as a grad student (publications, teachings). Feel free to check out my work and if you have any questions, comments, or would like to work with me, don't hesitate to contact me.

Teaching

2014 - 2015

  • C Programming and Project [link]
  • Architecture, Systems and Networks [link]

2015 - 2016

  • Programming training, multiple languages [link]
  • Parallel and Distributed Algorithms and Programs [link]

2015 - 2016

  • Compilers and Program Analysis [link]

Publications

Book chapters

2016

Coping with Silent Errors in HPC Applications.
G. Aupy, A. Benoit, A. Cavelan, M. Fasi, Y. Robert, H. Sun and B. Uçar.
A. Adamatzky, editor, Emergent Computation. Springer Verlag, 2016. [preprint][report]

Journal articles

2017

Multi-level checkpointing and silent error detection for linear workflows.
A. Benoit, A. Cavelan, Y. Robert and H. Sun.
JoCS: Journal of Computational Science, 2017. [preprint][report]
Towards Optimal Multi-Level Checkpointing.
A. Benoit, A. Cavelan, Y. Robert, V. Le Fèvre and H. Sun.
TC: Transactions on Computers, 2017. [preprint][report]

2016

Coping with Recall and Precision of Soft Error Detectors.
A. Benoit, A. Cavelan, Y. Robert and H. Sun.
JPDC, Journal of Parallel and Distributed Computing, 2016. [preprint][report]
Assessing General-Purpose Algorithms to Cope with Fail-Stop and Silent Errors.
A. Benoit, A. Cavelan, Y. Robert and H. Sun.
TOPC, ACM Transactions on Parallel Computing, 2016. [preprint][report]

Conferences and workshops

2016

When Amdahl Meets Young/Daly.
A. Cavelan, J. Li, Y. Robert and H. Sun.
Cluster, Taipei, Taiwan, September 13-15, 2016. [paper][report]
A different re-execution speed can help.
A. Benoit, A. Cavelan, V. Le fèvre, Y. Robert and H. Sun.
PASA@ICPP, Philadelphia, USA, August 16-19, 2016. [paper][report]
Optimal Resilience Patterns to Cope with Fail-Stop and Silent Errors.
A. Benoit, A. Cavelan, Y. Robert and H. Sun.
IPDPS, Chicago, USA, May 23-27, 2016. [paper][report]
Two-level checkpointing and verifications for linear task graphs.
A. Benoit, A. Cavelan, Y. Robert and H. Sun.
PDSEC@IPDPS, Chicago, USA, May 23-27, 2016. [paper][report]

2015

Which Verification for Soft Error Detection?
L. Bautista-Gomez, A. Benoit, A. Cavelan, S. K. Raina, Y. Robert and H. Sun.
HiPC, Bengaluru, India, December 16-19, 2015. [paper][report]
Scheduling Independent Tasks with Voltage Overscaling.
A. Cavelan, Y. Robert, H. Sun and F. Vivien.
PRDC, Zhangjiajie, China, November 18-20, 2015. [paper][report]
Assessing the Impact of Partial Verifications against Silent Data Corruptions.
A. Cavelan, S. K. Raina, Y. Robert and H. Sun.
ICPP, Beijing, China, September 1-4, 2015. [paper][report]
Voltage Overscaling Algorithms for Energy-Efficient Workflow Computations With Timing Errors.
A. Cavelan, Y. Robert, H. Sun and F. Vivien.
FTXS@HPDC, Portland, USA, June 15, 2015. [paper][report]

2014

Assessing General-Purpose Algorithms to Cope with Fail-Stop and Silent Errors.
A. Benoit, A. Cavelan, Y. Robert and H. Sun.
PMBS@SC, New Orleans, USA, November 16, 2014. [paper][report]

Other

Last modified: April 2017
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