1. Benoit Boissinot, Philip Brisk, Alain Darte, and Fabrice Rastello. SSI Properties Revisited. ACM Transactions on Embedded Computing Systems, 2010. Note: Special Issue on Software and Compilers for Embedded Systems . [bibtex-entry]

1. Christophe Guillon, Fabrice Rastello, Thierry Bidault, and Florent Bouchez. Procedure placement using temporal-ordering information: dealing with code size expansion. Journal of Embedded Computing, 1(4):437-459 , 2005. Keyword(s): cache optimization, NP-completeness, Instruction cache, code placement, code size, cache miss, min-matching, hamiltonian-path, profiling. [bibtex-entry]

1. Fabrice Rastello, Amit Rao, and Santosh Pande. Optimal Task Scheduling to minimize Inter-Tile Latencies. Parallel Computing, 29(2):209-239, February 2003. Keyword(s): automatic parallelization, tiling, nested loop, reordering, pipelined communications, uniform dependances, equivalence classes, intra-tile parallelism . [bibtex-entry]

1. Olivier Beaumont, Vincent Boudet, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Static Data Allocation and Load Balancing Techniques for Heterogeneous Systems. In C.K. Yuen, editor, Annual Review of Scalable Computing, volume 4, chapter 1, pages 1-37. World Scientific, 2002. [bibtex-entry]



2. Olivier Beaumont, Vincent Boudet, Fabrice Rastello, and Yves Robert. Partitioning a square into rectangles: NP-completeness and approximation algorithms. Algorithmica, 34 :217-239, 2002. Keyword(s): heterogeneous resources, load-balancing, communication cost, parallel computing, partitioning, NP-completeness, geometric problems, data allocation. [bibtex-entry]



3. Benoît Dupont de Dinechin, Christophe Monat, and Fabrice Rastello. Parallel Execution of the Saturated Reductions. Journal of VLSI Signal Processing Systems for Signal Image and Video Technology (JVSP/VLSI), 2002 . Keyword(s): Saturated Reductions, DSP, Approximate Implementation, ETSI / ITU Speech coding algorithms, Parallelisation, Instruction Level Parallelism. [bibtex-entry]



4. Fabrice Rastello and Yves Robert. Automatic Partitioning of Parallel Loops With Parallelepiped-Shaped Tiles. IEEE Trans. Parallel Distributed Systems, 13(5):460--470, May 2002. Keyword(s): tiling, compilation, data locality, loop partitioning, cache, parallelism, out-of-core algorithms, hierarchical memory systems, footprint . [bibtex-entry]

1. Olivier Beaumont, Vincent Boudet, Antoine Petitet , Fabrice Rastello, and Yves Robert. A proposal for a heterogeneous cluster ScaLAPACK (dense linear solvers). IEEE Transactions on Computers, 50(10):1052-1070, 2001. Keyword(s): heterogeneous networks, distributed-memory, different-speed processors, scheduling, mapping, numerical libraries, data allocation. [bibtex-entry]



2. Olivier Beaumont, Vincent Boudet, Fabrice Rastello , and Yves Robert. Matrix multiplication on heterogeneous platforms. IEEE Trans. Parallel Distributed Systems, 12(10):1033-1051, 2001 . Keyword(s): heterogeneous resources, cluster, different-speed processors, load balancing, data distribution, data allocation, geometric problems. [bibtex-entry]



3. Olivier Beaumont, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Dense linear algebra kernels on heterogeneous platforms: Redistribution issues. Parallel Computing, 28:155-185, 2001 . Keyword(s): heterogeneous platforms, different-speed processors, load-balancing, data redistribution, matrix product. [bibtex-entry]



4. Olivier Beaumont, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Static LU decomposition on heterogeneous platforms. Int. Journal of High Performance Computing Applications, 15(3):310-323, 2001 . Keyword(s): heterogeneous resources, load-balancing, communication cost, parallel computing, partitioning, NP-completeness, geometric problems, data allocation. [bibtex-entry]



5. Vincent Boudet, Fabrice Rastello, and Yves Robert. Alignment and distribution is NOT (always) NP-hard. Journal of Parallel and Distributed Computing, 61:501-519, 2001. Keyword(s): compilation techniques, parallel loops, alignment, distribution, ``the owner computes'' rule, tiling, data allocation, geometric problems. [bibtex-entry]

1. Pierre Boulet, Jack Dongarra, Fabrice Rastello, Yves Robert, and Frédéric Vivien. Algorithmic issues on heterogeneous computing platforms. Parallel Processing Letters, 9(2):197-213, 1999. Note: Extended version available as LIP Technical Report RR-98-49 . Keyword(s): heterogeneous networks, distributed-memory, different-speed processors, tiling, communication-computation overlap, mapping, LU decomposition, SOR program, critical path. [bibtex-entry]

1. Frédéric Desprez, Jack Dongarra, Fabrice Rastello, and Yves Robert. Determining the idle time of a tiling: new results. Journal of Information Science and Engineering, 14:167-190, 1998. Keyword(s): tiling, fully permutable loops, idle time, critical path, parallelism, SOR program. [bibtex-entry]

This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All person copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.

Les documents contenus dans ces répertoires sont rendus disponibles par les auteurs qui y ont contribué en vue d'assurer la diffusion à temps de travaux savants et techniques sur une base non-commerciale. Les droits de copie et autres droits sont gardés par les auteurs et par les détenteurs du copyright, en dépit du fait qu'ils présentent ici leurs travaux sous forme électronique. Les personnes copiant ces informations doivent adhérer aux termes et contraintes couverts par le copyright de chaque auteur. Ces travaux ne peuvent pas être rendus disponibles ailleurs sans la permission explicite du détenteur du copyright.

This document was translated from BibT_EX by bibtex2html