(I am not affiliated with Intel)

Nicolas Derumigny - Personal Page

email: nderumigny [at] gmail [dot] com
matrix: [at] nderumig [column] blabla [dot] thecamionnetteproject [dot] fr

Position

I am currently a postdoc at Telecom SudParis in the Benagil research team under the supervision of Gaël Thomas. I am also editor-in-chief and webmaster at Hardware & Co following my departure from Comptoir du Hardware.

I recieved a Ph.D in Computer Science in December 2023 for my work at Colorado State University under the supervision of Louis-Noël Pouchet and my work at Inria Grenoble (CORSE team) under the supervision of Fabrice Rastello. I recieved my Master's degree in Computer Science (High Performance Computing, Simulation) from Université Paris-Saclay in 2018 as part of my cursus at ENS de Lyon.

I work on a range of areas around hardware architecture, including:

  • CPU reverse-engineering
  • CPU simulation
  • Hardware-software codesign
  • Architecture-aware operating systems
  • Code transformations for FPGA High-Level Synthesis

Interesting Accounts

LinkedIn GitHub GitLab Google Scholar

CV

French English

Publications

In conferences

  • Nicolas Derumigny, Théophile Bastian, Fabian Gruber, Guillaume Iooss Christophe Guillon, Louis-Noël Pouchet and Fabrice Rastello,
    PALMED: throughput characterization for superscalar architectures,
    in 2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO'22). April 2022.
    (pdf, project website)

In workshops

  • Nicolas Derumigny, Louis-Noël Pouchet and Fabrice Rastello,
    Kernel Merging for Throughput-Oriented Accelerator Generation,
    in 13th International Workshop on Polyhedral Compilation Techniques (IMPACT 2023, in conjunction with HiPEAC 2023). January 2023.
    (pdf, slides, source code)
  • Alexis Lescouet, Nicolas Derumigny and Gaël Thomas,
    Scalevisor : Un pilote CPU et mémoire pour les gros multicœurs,
    in ComPAS : Conférence d’informatique en Parallélisme, Architecture et Système (ComPAS'18). July 2018.
    (pdf)

Preprints

  • Corentin Ferry, Nicolas Derumigny, Steven Derrien, Sanjay Rajopadhye,
    An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization of FPGA Accelerators,
    in ArXiv Preprint. January 2022.
    (pdf)
  • Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Brad Beckmann, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jeronimo Castrillon, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Carlos Escuin, Marjan Fariborz, Amin Farmahini-Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Anthony Gutierrez, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Miquel Moreto, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, William Wang, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon and Éder F. Zulian,
    The gem5 Simulator: Version 20.0+,
    in ArXiv Preprint. September 2022.
    (pdf)

Thesis

  • Nicolas Derumigny,
    Throughput Optimization Techniques for Heterogeneous Architectures,
    Ph.D Thesis (Colorado State University, Université Grenoble-Alpes), December 2023.
    (manuscript, slides)
  • Nicolas Derumigny,
    (Contributions to) Scalevisor: using hypervision to build a memory driver for NUMA machines,
    Master Thesis (Université Paris-Saclay), September 2018.
    (manuscript, slides)

Teaching

  • INF301: Introduction to Algorithm and Imperative Programming (Université Grenoble-Alpes) (Fall 2019, Fall 2020)

Others

Arch User Repository package I maintain:

Legacy links

GAP M2 CHPS