O. Oulkaid, B. Ferres, M. Moy, P. Raymond, M. Khosravian, L. Henrio, G. Radanne. 2024.
A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving.
In Design Automation and Test in Europe. Valencia, Spain. pp.1–6.
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B. Ferres, O. Oulkaid, L. Henrio, M. Khosravian, M. Moy, G. Radanne, P. Raymond. 2023.
Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory.
In Design Automation and Test in Europe. Antwerp, Belgium. pp.1–2.
[
pdf,
bib]