/!\ Warning: this tutorial requires ~40 GB of free space and 16 GiB of RAM!
In this tutorial, we will learn how to add MMIO peripherals to an SoC orchestrated around the RISC-V CVA6. For that, we will use FPGA (Field Programmable Gate Array), a class of reprogrammable chips that can be user-configured at the logic gate level to create application-specific design or (as in our case), general-purpose cores called softcores.
The objective of this tutorial is to experiment the different levels of customization required to have functional devices:
This tutorial is decomposed in 6 steps:
1. Introduction - Presentation of the boards / adapters