Faculty Research Scientist at INRIA
Co-founder and scientific advisor of the XtremLogic start-up company
Laboratoire de l'Informatique du Parallelisme, ENS-Lyon
Habilitation thesis (HDR), slides.
- Source-level program analysis and optimization
- High-level hardware generation, FPGAs
- Polyhedral compilation and extensions
- Tools for polyhedral compilation
Software transfered to industry
- Bee. Array contraction under scheduling constraints.
- Dcc. Derivation of Data-aware process networks from annotated C programs. See patent FR1453308 for more details.
- PoCo. Polyhedral compilation framework.
- MPP. Parametric tiling of domains and index functions. See the PhD thesis of G. Iooss.
- Chuba. Efficient compilation of remote memory accesses for the HLS tool C2H of Altera.
See the PhD thesis of A. Plesco.
- Rank. Program termination and symbolic estimation of the worst-case computational complexity.
- Alexandru Plesco, "Program Transformations and Memory Architecture Optimizations for High-Level Synthesis of Hardware Accelerators", with A. Darte et T. Risset, defended at ENS-Lyon on September 2010, thesis. Now CEO@Xtremlogic.
- Guillaume Iooss, "Detection of Linear Algebra Operations in Polyhedral Programs", with A. Darte and S. Rajopadhye, defended at Colorado State university (co-tutelle) on July 2016, thesis. Now post-doc@Inria/Parkas.
LIP, ENS Lyon
46, Allee d'Italie
69364 Lyon Cedex 07, France
+33/0 4 72 72 85 03
+33/0 4 72 72 80 80
Christophe(dot)Alias( - a t - )ens-lyon(dot)fr