Compilation and embedded systems.
pour une version française.
Erratum to the book
Scheduling and Automatic Parallelization, or everything
you've always wanted to know about parallel loop detection (but were
afraid to ask)!
Erratum to the
book (in french)
Algorithmique et optimisation, exercices corrigés, exercices you
should try to do if you want to enter an école normale supérieure as a
My research activities concern optimization problems linked to the
analysis, the parallelization, and the automatic transformations of
codes, more precisely of code fragments with a repetitive structure,
e.g., codes containing loops. To give a brief overview of my past
research interests, here is a list of the main topics I considered:
Automatic parallelization and high-level code transformations,
among others detection of parallel loops and compilation of (and towards) High
Assembly-level code optimization (software pipelining, register
allocation, SSA form);
Automatic design of systolic arrays and hardware accelerators.
In the study of these three topics, which have some overlap because of
the models, the mathematical tools, or the optimizations they need, I
worked more specifically on:
systems of uniform recurrence equations ;
scheduling algorithms, mainly for cyclic graphs;
algorithms for detection of parallel loops, permutable
loops, and tiling;
loop fusion and statement shifting (or retiming);
optimizations linked to the allocation of multi-dimensional
arrays and memory reuse;
the different phases in register allocation, spilling, coalescing,
the SSA form (static single assignment), construction, destruction,
Through these research efforts, my goal is to study optimization
techniques that can be automated so as a) to improve the theoretical
foundations of the existing domain of program compilation and
optimization, b) to develop compilation techniques and to push them in
the field of automatic generation of hardware accelerators, which is
not mature enough for automation yet, but which is a good candidate
Ph.D. and HDR thesis (in french)
"Techniques de parallélisation automatique de nids de
"De l'organisation des calculs dans les codes répétitifs".
Laboratoire de l'Informatique du Parallélisme
École normale supérieure de Lyon
46, Allée d'Italie
69007 Lyon, France
fax: (+33) (0)4 72 72 80 80
phone: (+33) (0)4 72 72 89 01
42, rue Saint Jean
69005 Lyon, France
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Last modification: June 2010